1. Field of the Invention
The present invention relates to a noise reducing method for a radio portable terminal, and, more particularly, to a noise reducing method for reducing noise generated by a central processing unit (CPU) in a radio portable terminal.
2. Description of the Related Art
Conventional measures against noise in a radio portable terminal include a scheme of stopping the operation of the CPU in the radio portable terminal at the time of receiving data and a scheme of shielding the CPU, an external memory, and so forth. Recently, there has been a demand for an improvement of the processing performance of radio portable terminals, which has led to an increasing use of fast CPUs in the radio portable terminals. Thus, it is not a good idea to stop the operation of the CPU in tile radio portable terminal at the time of receiving data.
When the CPU in a radio portable terminal accesses an external memory, large noise is generated. To suppress noise by reducing the number of accesses to the external memory, the conventional radio portable terminals use an exclusive read only memory (ROM) or random access memory (RAM) incorporated in the CPU.
For example, Japanese Patent No. 2748773 (hereinafter called xe2x80x9cfirst prior artxe2x80x9d)
discloses a method of reducing noise generated by the operation of a CPU used in a radio receiving circuit, thereby improving the sensitivity of the radio receiving circuit.
FIG. 7 presents a structural diagram of a conventional radio portable terminal which is disclosed in the first prior art. The radio portable terminal shown in FIG. 7 comprises a microprocessor 300 which operates in a dual mode, an interface 205, a user interface 117, a mode switch 308, a RAM 202 and a ROM 201.
This dual-mode microprocessor 300 has a RAM 301 and ROM 302 as its internal memories. The ROM 302 may be a masked ROM or an erasable programmable ROM (EPROM). This dual-mode microprocessor 300 may further include an electrically erasable programmable ROM (EEPROM) 303 which can be used for permanent storage of a program or data.
The mode switch 308 is connected to first-mode and second-mode select terminals (not shown) via a plurality of conductors 309. The user interface 117 is connected via a control input conductor 307 to the microprocessor 300 to provide the microprocessor 300 with predetermined information. Specifically, the control input conductor 307 provides means for starting the mode change (between the first mode and the second mode) in the dual-mode microprocessor 300. The user interface 117 is connected to the microprocessor 300 by a plurality of data input lines 305 and a plurality of data output lines 306.
It is understood from experiments that the level of noise generated in the dual-mode microprocessor 300 can be reduced considerably when the microprocessor 300 operates only in internal mode (the aforementioned first mode) where the individual internal memories 301, 302 and 303 are mainly used, as compared with a case where the microprocessor 300 operates in external mode (the second mode) in which an external memory is used. In the first prior art, therefore, the dual-mode microprocessor 300 operates while being switched to a single-chip mode, i.e., the internal mode, or an extension mode, i.e., the external mode. Specifically, the basic operation is carried out in single-chip mode in which case noise to be generated by an operation to access an external device connected to the CPU or an external memory via an external bus is minimized. When the microprocessor 300 is operating in this single-chip mode, the ROM 201 and RAM 202 as external memories are inactive. Further, no signals are flowing through an external address bus 203 and a data bus 204. The level of noise to be generated is reduced by setting those external memories and external buses inactive and optimizing the time for which the microprocessor 300 operates in single-chip mode.
To reduce the level of noise generated by the microprocessor 300 while the radio portable terminal is receiving radio data, the programs that are stored in the dual-mode microprocessor 300 should be categorized. More specifically, individual modules (routines) included in the programs are associated with the respective functions of the radio portable terminal by systematically analyzing the codes of each program. Based on those functions, the modules can be separated into two main categories.
The modules of the first category are associated with the functions that are susceptible to the influence of noise, e.g., the radio receiving function. The modules of the first category are executed inside the microprocessor 300 when it is operating in single-chip mode.
The modules of the second category are associated with the functions that are insusceptible to the influence of noise, such as the radio transmitting function, the function for changing the operation mode of the radio portable terminal, and the function to communicated with a user. The modules of the second category operate in extension mode using the ROM 201 and RAM 202 as external memories, the external address bus 203, and the data bus 204.
It is ideal to store all the modules of the first category in the internal ROM (EPROM) 302, more desirably, into the internal EEPROM 303 of the microprocessor 300. The EEPROM 303 may further retain data which varies only occasionally. To effectively use an additional memory which is provided by the internal RAM 301, the modules of the first category are further separated into a main algorithm and sub algorithms.
The main algorithm of the first category consists of an active program which runs continuously. The sub algorithms are programs which are called as needed and frequently use the external address bus, and each sub algorithm is formed by, for example, a delay loop or a loop which monitors a change in the status of the input or the like. The software is designed in such a way that the main algorithm of the first category is permanently saved in the internal ROM 302 (EPROM) of the microprocessor 300 and the sub algorithms of the first category are stored first in the external memories 201 and 202. Each sub algorithm is transferred to the internal RAM 301 every time it is called or only when its specific module is needed. Once the module of any sub algorithm is loaded into the internal RAM 301, this sub algorithm is executed when the microprocessor 300 returns to the single-chip mode or the internal mode.
Unexamined Japanese Patent Publication (KOKAI) No. Hei 7-203510 (hereinafter called xe2x80x9csecond prior artxe2x80x9d) discloses a method of reducing the frequency of the system reference clock when a radio portable terminal is used.
Another Unexamined Japanese Patent Publication (KOKAI) No. Hei 8-70258 (hereinafter called xe2x80x9cthird prior artxe2x80x9d) discloses a method of changing the frequency of the reference clock in such a manner as to avoid interference between the frequency that is used in the transmission and reception operations of a radio portable terminal and the harmonics of the reference clock.
The aforementioned first prior art has the following problems.
The first problem is the necessity of an exclusive CPU. That is, because a RAM and ROM should be incorporated in a CPU in the first prior art, a conventional ordinary CPU cannot achieve the object.
The second problem lies in that the RAM should be of an exclusive type for the following reason. As a cache in a general-purpose CPU is capable of automatically caching a saved command or data, such a command or data in the incorporated cache is freely rewritten when an external memory is accessed. This leads to the necessity of an exclusive RAM which prevents automatic rewriting of the contents of the cache.
Another solution is to store a program (commands) or data in a non-cache area so that the program (commands) or data will not be cached. But, this scheme prevents the internal RAM from functioning as a cache in normal operation mode, the system""s processing speed in normal operation mode is slowed.
The third problem is that the CPU to be used itself becomes expensive because the CPU should be a special chip, not a general-purpose one, in order to avoid the first and second problems.
The second prior art suffers the following problems.
First, the performance gets lower as the reception speed becomes lower. That is, the second prior art is directed to a reception-only terminal and the operation clock is always reduced when the terminal is connected to a communication circuit to receive radio data. More specifically, if this prior art is adapted to a terminal having both transmission and reception capabilities, the operation clock is decreased both in transmission mode and reception mode, the performance is significantly lowered.
Secondly, operation clocks are needed for two systems for the following reason. Most of general-purpose CPUs do not have two clock inputs, and the clocks of general-purpose CPUs which have two clock inputs are a normal operation clock and a clock for measuring the time. The frequency of the time measuring clock is about 32 KHz, which is very slow as the reference clock for radio reception. The use of this clock leads to a considerable reduction in reception speed and is not therefore practical. In this case, an exclusive CPU equipped with another clock input becomes necessary.
Thirdly, when the frequency of the reference clock is reduced or the reference clock is disabled at the time of radio reception, it takes time to return to the normal processing, resulting in a significant reduction in performance. Further, reducing the frequency of the reference clock requires that the OS (Operation System) should handle control of the operation of the radio unit.
Furthermore, this terminal may fail to properly receive reception data for the following reason. It takes time to adjust the timer or clock or time to stabilize the PLL (Phase Locked Loop) or crystal oscillator after the reduction of the clock frequency or the disabling of the reference clock, so that the reception operation cannot be initiated during such a time. This leads to a significant reduction in performance. If the timer or the like in the OS gets wrong, the radio unit does not operate properly and some adjustment should be performed to set the radio unit in the proper operation. Such processing needs a considerable time to restore the normal reception operation, so that processing of received data may not be completed in time to catch the next data.
The third prior art have the following problems.
First, this prior art copes only with the noise that is generated by the reference clock used in a radio section. That is, while generation of noise by the CPU""s access to the external bus is dominant in an actual radio portable terminal, the third prior art is directed to a measure against noise generated in the radio section and this method cannot cope with a radio portable terminal which has the radio section integrated with the CPU that performs transmission and reception of information.
Secondly, the noise that is generated by the CPU""s access to the external bus has a wide frequency band. The frequency band of the noise generated by the CPU""s access to the external bus has a width of several MHz, so that alight alteration of the reference clock cannot eliminate the influence of noise on the frequency band used in radio communication.
Thirdly, some radio portable terminals do not make access synchronous with the reference clock. The timing for memory access is determined by the time, not based on the reference clock. When the operation reference clock is changed, therefore, the timing for memory access is changed and the proper memory access may not be carried out. It is not therefore possible to significantly alter the operation clock of the system.
Accordingly, it is a primary object of the present invention to provide a noise reducing method for a radio portable terminal, which stores an internal operation program that does not access an external memory in a cache incorporated in a CPU in synchronism with data received by radio, and allows the radio portable terminal to be operated only with access to the internal cache at the time of radio reception, thereby reducing access to the external memory, so that noise to received data can be reduced.
It is another object of this invention to provide a noise reducing method for a radio portable terminal, which can reduce noise by masking interruption to a CPU before a predetermined program is stored in an internal cache in the CPU, thereby suppressing rewriting of a program stored in the cache and preventing access to an external memory of the CPU.
To achieve the above objects, this invention employs the following technical structures.
According to one aspect of this invention, there is provided a noise reducing method for a radio portable terminal having a radio section for transmitting and receiving radio data, a CPU (Central Processing Unit), connected to the radio section and incorporating a cache, for performing predetermined data processing, and an external memory connected to the CPU, which method comprises the steps of reading an internal operation program runnable only in the CPU from the external memory and storing the internal operation program in the cache prior to reception of the radio data; and then executing only the internal operation program and suppressing access to the external memory during reception of the radio data, thereby reducing noise.
According to another aspect of this invention, there is provided a noise reducing method for a radio portable terminal having a radio section for transmitting and receiving radio data, a CPU, connected to the radio section, for performing data processing, and an external memory connected to the CPU, which method comprises the steps of giving a priority order to individual processes to be executed by the radio portable terminal; and masking an interruption process of low priority so as not to execute the masked interruption process at a time of receiving the radio data, thereby reducing noise at a time of receiving the radio data. dr
FIG. 1 is a diagram showing the structure of a radio portable terminal according to one embodiment of this invention;
FIG. 2 is a time chart illustrating the transmission and reception timings of a radio section in the radio portable terminal shown in FIG. 1;
FIG. 3 is a flowchart illustrating a sequence of processes of the radio portable terminal shown in FIG. 1 from the generation of a request for reception of radio data to the end of data reception;
FIG. 4 is a diagram showing the structure of a radio portable terminal according to another embodiment of this invention;
FIG. 5 is a flowchart illustrating a sequence of processes of the radio portable terminal embodying this invention in a case where transmission and reception are alternately performed; and
FIG. 6 is a flowchart illustrating a sequence of processes of the radio portable terminal embodying this invention in a case of a radio system which has a sufficiently long interval for switching transmission and reception from one to the other.
FIG. 7 is a block diagram showing the structure of the conventional radio portable terminal.